Ultra-Fast Variable Photonic Time Delay Line – NanoSpeed™ Switching

50ns reconfiguration speed

The NSTD Series Photonic Time Delay generates variable time delay by selectively routing optical signals through N (<=8) fiber segments whose lengths increase successively by a power of 2 to form a N bit digital delay line.  The NSTD allows customers to splice each fiber loop, creating increments of DT, up to the maximum value T. The switching between each loop is achieved using a patented non-mechanical configuration. The solid-state configuration eliminates the need for mechanical movement and organic materials. The device is designed to meet the most demanding switching requirements of ultra-high reliability and fast response time.

Ultra-Fast Variable Photonic Time Delay Line - NanoSpeed™ Switching

The NSTD Series Photonic Time Delay generates variable time delay by selectively routing optical signals through N (<=8) fiber segments whose lengths increase successively by a power of 2 to form a N bit digital delay line.  The NSTD allows customers to splice each fiber loop, creating increments of DT, up to the maximum value T. The switching between each loop is achieved using a patented non-mechanical configuration. The solid-state configuration eliminates the need for mechanical movement and organic materials. The device is designed to meet the most demanding switching requirements of ultra-high reliability and fast response time.
  NSTD Series Photonic Delay Line Min Typical Max Unit
Central Wavelength    850 1610 nm
Bit resolution [1] 4 8
Insertion Loss [2] 4.0 5.2 dB
Cross Talk      20 25 dB
Switching Time (fall, rise) 300 400 ns
Repetition Rate [3] 100 kHz
Delay Time Range ns µs
PDL [4] 0.3 1.0 dB
Return Loss 45 dB
Fiber type SM fiber or PM fiber  
Operating Temperature 0 60 oC
Optical Power Handling [5]     500 mW
Storage Temperature -5 85 oC
Package Dimension [6] 19” mount rack

[1]: TBD per customer’s request.

[2]: Measured at 4-bit device, excluding the loss of long delay fibers. 1dB additional loss will be added per bit after 4-bit.

[3]: for each switching core.

[4]: Defined at 4-bit delay line

[5]: Measured at 1550nm.

[6]: Mount rack height will be determined based the final delay.